The present invention relates to a band-gap reference circuit for use with an input/output buffer design capable of handling multiple types of signals. More particularly, the present invention relates to band-gap reference for a circuit capable of driving loads for different types of circuitry, such as Peripheral Component Interconnect (PCI) circuitry, Gunnings Transceiver Logic (GTL), Emitter Coupled Logic (ECL), Series Stub Terminated Logic (SSTL), or Pseudo Emitter Coupled Logic (PECL) using low voltage devices.
Circuits constructed in accordance with standards such as PCI, GTL, ECL, SSTL or PECL each have different high and low state characteristics. Although some of the states for different circuit types will have similar voltage and current requirements, others will be different.
PCI provides a high speed bus interface for PC peripheral I/O and memory and its input and output voltage and current requirements are similar to CMOS. For instance, the high and low voltage states will vary from rail to rail (VDD to VSS) with high impedance low current inputs and outputs.
GTL provides a lower impedance higher current high state, providing a low capacitance output to provide higher speed operation. The transition region for GTL is significantly smaller than for CMOS.
PECL provides a high current low voltage to provide a smaller transition region compared to CMOS to better simulate emitter coupled logic (ECL). The PECL offers a low impedance outputs and a high impedance inputs to be the most suitable choice of logic to drive transmission lines to minimize reflections.
Integrated circuit chips, such as a field programmable gate array (FPGA) chip, or a complex programmable logic device (CPLD), provide functions which may be used in a circuit with components operating with any of the logic types, such as PCI, GTL, ECL, PECL, or SSTL described above. To accurately provide appropriate PCI, GTL, etc. voltage levels with variations in temperature and power supply voltages, a bandgap reference can be used. More recent FPGA and PLD circuits operate with a power supply as low as 1.3 volts. With a typical bandgap reference of 1.2 volts, with slight variations in the power supply, the bandgap voltage will become unstable. It would be desirable to have an input/output buffer for use on a general applicability chip such as a FPGA or CPLD which will accurately provide voltages and currents at a desired level using a low voltage power supply.
In accordance with the present invention, an input/output buffer circuit is configured to be made compatible with any of a number of logic types, such as PCI, GTL, or PECL, and to operate down to a voltage supply level of 1.3V or lower using a bandgap reference which provides a stable reference of 1.0V or lower.
In accordance with the present invention, a band gap reference provides a reference voltage (VDIODE) at 1.0 volt or below to provide a stable reference for 1.3 volt or lower circuits, which would otherwise not function accurately with a typical band gap reference of 1.2 volts. The band gap reference includes an op-amp equally driving the gate of various current source transistors. A first current source drives a BJT transistor connected in a diode fashion, while a second current source drives a further diode connected BJT transistor through a resistor. An output VDIODE is provided from a further resistor connected to two additional current sources. The first of these current sources is driven by the op-amp output to increase output with temperature, while the second of these current sources is driven by a replicating op-amp connected to a resistor providing current decreasing with temperature, both current sources functioning to provide a stable low voltage VDIODE on the resistor with variations in temperature and supply voltage.